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Speculative execution
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#	Item
21	Wshp. on Memory Performance Issues, Intl. Symp. on Computer Architecture, June[removed]Speculative Locks for Concurrent Execution of Critical Sections in Shared-Memory Multiprocessors Jose´ F. Mart´ınez and Josep Torre Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2003-12-19 18:12:59 Computer hardware Central processing unit Threads Microprocessors Lock Non-blocking algorithm Simultaneous multithreading Parallel computing Critical section Concurrency control Computing Computer architecture
22	Prototyping Architectural Support for Program Rollback: An Application to Software Debugging Radu Teodorescu and Josep Torrellas University of Illinois at Urbana-Champaign Several recently-proposed architectural techniqu Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2005-03-04 16:59:35 Central processing unit Microprocessors Josep Torrellas Speculative execution Debugging Microarchitecture Kernel Computer program Compiler Computing Computer architecture Computer hardware
23	CAVA: Using Checkpoint-Assisted Value Prediction to Hide L2 Misses LUIS CEZE, KARIN STRAUSS, JAMES TUCK, and JOSEP TORRELLAS University of Illinois at Urbana–Champaign and JOSE RENAU Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2010-12-27 00:10:17 Central processing unit Computer memory Runahead Cache CPU cache Branch predictor Microarchitecture Memory hierarchy Speculative execution Computer architecture Computer hardware Computer engineering
24	The Design Complexity of Program Undo Support in a General Purpose Processor Radu Teodorescu and Josep Torrellas University of Illinois at Urbana-Champaign http://iacoma.cs.uiuc.edu Add to Reading List Source URL: iacoma.cs.uiuc.edu Language: English - Date: 2010-12-25 18:05:40 Computing CPU cache Undo Speculative execution Application checkpointing Rollback Speculative Processor register Computer architecture Computer hardware Central processing unit
25	Speculative Updates of Local and Global Branch History: A Quantitative Analysis Kevin Skadron SKADRON @ CS . VIRGINIA . EDU Add to Reading List Source URL: www.jilp.org Language: English - Date: 2003-06-05 15:33:55 Central processing unit Instruction set architectures Branch predictor Alpha 21264 CPU cache Out-of-order execution Register renaming Microarchitecture DEC Alpha Computer architecture Computer engineering Computer hardware
26	Combining User Interaction, Speculative Query Execution and Sampling in the DICE System Prasanth Jayachandran Karthik Tunga Niranjan Kamat Arnab Nandi Computer Science & Engineering The Ohio State University {jayachan,tu Add to Reading List Source URL: www.vldb.org Language: English - Date: 2014-07-27 00:16:20 Information Database management systems Information technology management Online analytical processing Online aggregation Database Aggregate Query language Data management Database theory Data
27	Analysis of the overheads incurred due to speculation in a task based programming model. Rahulkumar Gayatri§ † , Rosa M. Badia§ [ , Eduard Ayguade § † Add to Reading List Source URL: research.ac.upc.edu Language: English - Date: 2015-01-12 08:06:50 Thread Computer architecture Lock Speculative execution Multi-core processor Speculative Central processing unit Computing Parallel computing Concurrent computing
28	HotOS[removed]Aggressive Prefetching: An Idea Whose Time Has Come∗ Athanasios E. Papathanasiou and Michael L. Scott University of Rochester {papathan,scott}@cs.rochester.edu Add to Reading List Source URL: www.cs.rochester.edu Language: English - Date: 2011-04-01 10:23:48 Computer hardware Paging Speculative execution Computer data storage Computer memory Fasterfox Link prefetching Cache Computing Computer architecture
29	ASC: Automatically Scalable Computation Amos Waterland Elaine Angelino Ryan P. Adams Jonathan Appavoo Add to Reading List Source URL: www.eecs.harvard.edu Language: English - Date: 2014-03-30 22:04:09 Branch predictor Instruction set architectures CPU cache Parallel computing Automatic parallelization Central processing unit X86 Speculative execution Computer architecture Computing Computer hardware